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Test generation of crosstalk delay faults in VLSI circuits / by S. Jayanthy and M. C. Bhuvaneswari

By: Contributor(s): Material type: TextPublication details: Singapore : Springer, 2019Description: xi, 156 pISBN:
  • 9789811324925
Subject(s): DDC classification:
  • 621.3815 JAY-T
Summary: This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing
Item type: Books
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Current library Call number Status Barcode
UMT Main Campus 621.35815 JAY-T (Browse shelf(Opens below)) Available 152301

Includes bibliographical references

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing

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