| 000 | 00509nam a2200181Ia 4500 | ||
|---|---|---|---|
| 001 | 59786 | ||
| 008 | 140520s9999 xx 000 0 und d | ||
| 020 | _a8181285867 | ||
| 040 | _cPK-LaUMT | ||
| 082 |
_a 621.395 _bMAH-T |
||
| 100 | _aMaheshwari, Naresh | ||
| 245 |
_aTiming analysis and optimization of sequential circuits _cMaheshwari, Naresh<>Sapatnekar, Sachin S. |
||
| 260 |
_aNew Delhi,India: _bSpringer, _c1999 |
||
| 300 | _a190 p. | ||
| 546 | _aEN | ||
| 700 | _aSapatnekar, Sachin S. | ||
| 942 | _cBK | ||
| 999 |
_c57114 _d57114 |
||