000 00500nam a2200181Ia 4500
001 57500
008 140507s9999 xx 000 0 und d
020 _a9788131755020
040 _cPK-LaUMT
082 _a 621.39028553
_bZWO-D
100 _aZwolinski, Mark
245 _aDigital system design with system verilog
_cZwolinski, Mark
260 _aNew Delhi,India:
_bPearson,
_c2011
300 _a367 p.
546 _aEN
650 _aVerilog (computer hardware description language)
942 _cBK
999 _c54785
_d54785