000			01369nam a22002417a 4500
005			20260408155351.0
008			260407s2019 |||||||| |||| 00| 0 eng d
020			_a9789811324925
040			_cPK-LaUMT
082			_a621.3815 _bJAY-T
100	1		_aJayanthy, S. _910551
245	1	0	_aTest generation of crosstalk delay faults in VLSI circuits / _cby S. Jayanthy and M. C. Bhuvaneswari
260			_aSingapore : _bSpringer, _c2019
300			_axi, 156 p.
500			_aIncludes bibliographical references
520			_aThis book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing
546			_aEng
650			_aMicroprogramming _910552
650			_aLogic design _95533
650			_aCircuits and system _910553
700	1		_aBhuvaneswari, M. C. _910554
942			_cBK
999			_c140379 _d140379