<?xml version="1.0" encoding="UTF-8"?>
<mods xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://www.loc.gov/mods/v3" version="3.1" xsi:schemaLocation="http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-1.xsd">
  <titleInfo>
    <title>Test generation of crosstalk delay faults in VLSI circuits</title>
  </titleInfo>
  <name type="personal">
    <namePart>Jayanthy, S.</namePart>
    <role>
      <roleTerm authority="marcrelator" type="text">creator</roleTerm>
    </role>
  </name>
  <name type="personal">
    <namePart>Bhuvaneswari, M. C.</namePart>
  </name>
  <typeOfResource>text</typeOfResource>
  <originInfo>
    <place>
      <placeTerm type="text">Singapore</placeTerm>
    </place>
    <publisher>Springer</publisher>
    <dateIssued>2019</dateIssued>
    <issuance>monographic</issuance>
  </originInfo>
  <language>
    <languageTerm authority="iso639-2b" type="code">eng</languageTerm>
  </language>
  <physicalDescription>
    <form authority="marcform">print</form>
    <extent>xi, 156 p.</extent>
  </physicalDescription>
  <abstract>This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing</abstract>
  <note type="statement of responsibility">by S. Jayanthy and M. C. Bhuvaneswari</note>
  <note>Includes bibliographical references</note>
  <note>Eng</note>
  <subject>
    <topic>Microprogramming</topic>
  </subject>
  <subject>
    <topic>Logic design</topic>
  </subject>
  <subject>
    <topic>Circuits and system</topic>
  </subject>
  <classification authority="ddc">621.3815 JAY-T</classification>
  <identifier type="isbn">9789811324925</identifier>
  <recordInfo>
    <recordContentSource authority="marcorg"/>
    <recordCreationDate encoding="marc">260407</recordCreationDate>
    <recordChangeDate encoding="iso8601">20260408155351.0</recordChangeDate>
  </recordInfo>
</mods>
