01369nam a22002417a 4500 20260408155351.0 260407s2019 |||||||| |||| 00| 0 eng d 9789811324925 PK-LaUMT 621.3815 JAY-T Jayanthy, S. 10551 Test generation of crosstalk delay faults in VLSI circuits / by S. Jayanthy and M. C. Bhuvaneswari Singapore : Springer, 2019 xi, 156 p. Includes bibliographical references This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing Eng Microprogramming 10552 Logic design 5533 Circuits and system 10553 Bhuvaneswari, M. C. 10554 BK 140379 140379 0 0 0 0 01 01 2026-04-07 0 621.35815 JAY-T 152301 2026-04-07 10:12:58 2026-04-07 BK